Computer Architecture 3240

Please note: This page is under construction, it is not valid until the beginning of the Fall 2026 semester.

In this course we will study the operation of a modern processor. This includes the data and instruction paths, as well as the implementation of the control unit. We will discuss the basics of performance, and how this can be enhanced with techniques such as branch prediction, pipelining and the use of cache.

This class meets MWF 9:00 to 9:50 in Ross 136.

Announcements:

I am the instructor of record for this class. Only the instructor of record can properly grade coursework and issue midterm and final grades.
The zoom id for this class, should it be needed, is xxxxxxx
- This is only for cases when students are restricted to home for official documented reasons (quarantine requirement, snow days).
- It is not available for personal reasons, including appointments and sickness.
- You must make arrangements for me to activate this link WELL BEFORE class time.