Hardware for CRC Check

• First let us work through the example on 190, 191

  D = 1010001101
  P = 110101
  
                          1101010110 
                   -----------------
            110101 | 101000110100000
  	           110101
  		    111011
  		    110101
  		      111010
  		      110101
  		        111110
  			110101
  			  101100
  			  110101
  			   110010
  			   110101
  			     01110
  So the remainder is 01110
  We can now Build the message 25D+R
     M = 101000110101110
  
  Send this.  When it arrives, we divide by P again.
                            1101010110 
                      ----------------- 
               110101 | 101000110101110
  	              110101
  		       111011   
  		       110101
  		         111010
  			 110101
  			   111110
  			   110101
  			     101111
  			     110101
  			      110101
  			      110101
                                      0
     

• Let us build a circuit to evaluate the CRC bit.
• First we need a shift register, TKGate doesn't supply one, so I had to make one.
• 
• The .v file
• I am picking off the high bit and shifting left here.
• Next Stallings tells us that we form a circuit
  • If P has n bits, we use n-1 flipflops.
  • Each 1 in the pattern is just a flip flop
  • Each 0 in the patter is followed by a xor
  • No FLip Flop for the MSB of P.
• From another Source (Cyclic Redundancy Check: theory, practice, hardware, and software with emphasis on CRC-32. A sample chapter from Henry S. Warren, Jr. "Hacker's Delight" book., http://www.hackersdelight.org/crc.pdf)
• The algorithm is somewhat more than we really want to go into.
• So here is the hardware
• 
• Implementation file
• Filp the clear switch and press tab.
• Flip the register load switch and press tab
• Press tab 10 times with 51A0 (the input string) to find CRC
• Press tab 15 times with 51AE (input + CRC) to check this
• Press tab 15 times with some permutation to see not zero result

Error Correction

• Error correction is really useful when retransmitting packets is really expensive
  • Very lossy as in wireless
  • Extremely long propagation delay as in satellite links.
• Error correction is an expensive process which is not always possible
• Stallings gives us a method.
  • The transmitter encrypts a data block and transmits it.
  • On the other end, the encrypted block (or codeword) is examined
  • If it is an acceptable code block it is decoded and delivered
  • If it is a recoverable code block, it is recovered and delivered
  • Otherwise it is marked as a unrecoverable error and retransmission is requested.
  • Note, some erroneous code blocks may be received as correct.
• This is accomplished by adding redundancy information to the data
• Stallings notes: "Our discussion deals only with basic principles; a discussion of specific error-correcting codes is beyond our scope"
• A Hamming distance Is the measurement of the difference between two bit strings.

  10110 and 10110 have a hamming distance of 0
  10110 and 00110 have a hamming distance of 1
  10110 and 00100 have a hamming distance of 2
  10110 and 01100 have a hamming distance of 3
      

• It doesn't matter which bits, just that some bits are different.
• Stallings suggests encoding data as follows

  00  00000
  01  00111
  10  11001
  11  11101
      

• Notice the hamming distance between each is at least 3
• There are 32 possible values we receive.
• 4 are valid
• A simple bit inversion 10000 for example must have been a 00000
• This is true for 20 of the 32 possible patterns
• This means that 8 remain as uncorrectable 2 bit errors.
• Stallings further points out that all double bit errors will be detected.