Digital Data Communications Techniques

• We are concerned about
  • How can I synchronize a data transmission between the two endpoints?
  • How can I detect errors?
  • What detected errors can be corrected?
• Stallings tells us that leaving the section on data transmission and entering the world of data communications.
• We will be concerned with the serial transmission of data.
  • The data travels down a single path one symbol at a time.
  • Remember this symbol may represent a number of bits.
  • As we saw with 1000Base-T, multiple paths could be involved.
• At the receiving end, we need to sample the signal once per symbol time.
  • A modified Stallings example:
  • Assume a 1Mbps channel
  • A bit is transmitted every 1/10⁶ seconds.
  • This corresponds to a 1μ second clock period
  • Assume we would like to sample at the middle of every 1/2 cycle of the clock.
  • What if the clocks are off by 2%. or .02μ second
  • Every bit it drifts .02 μseconds.
  • After 12.5 bits it will have drifted .25μ sec.
  • This will put it into the next 1/2 cycle of the clock.
  • 
• Asynchronous Transmission
  • This describes how the signal is sent, not the number of signals in transit.
  • This avoids timing problems by
    • Only transmitting short bursts of bits (8 for example)
    • Forcing a synchronization signal before and after the bursts.
  • From Stallings.
    • Assume NRZ-L (1 is low, 0 is high, never go to middle state)
    • Low is the idle state of the line.
    • Begin each burst of bits with a 0
    • This synchronizes the clocks.
    • Send the bits (Stallings suggest LSB first)
    • Send a parity bit.
    • Send a stop element, this is a 1
    • The stop element can possibly have a longer duration.
    • If we wish to send the character N, (ascii 1001110 )
      • The check bit would be 0 (for even parity)
      • The data stream would 01110010
      • 
    • What is the overhead here?
      • Assume the previous example.
      • Assume a 1 bit delay for the stop bit.
      • 2 control bits
      • 8 data bits.
      • 20% overhead (2/10)
    • By increasing the block size, we could reduce the overhead, but we increase the chances of a error.
    • The data plus the control bits are called a frame.
    • If an error is introduced in the frame, this is called a frame error
• Synchronous Transmission
  • No control bits are transmitted.
  • But this requires an additional clock signal.
    • It can come from an external line
    • It can come from the encoding technique (Differential Manchester)
  • Usually frames begin and end with preamble and postamble bit patterns (to mark the beginning and end of the frame)
  • Control fields may be appended to the beginning or end of the frame.
  • This, too, is called a frame.
  • 
  • An example (from the book, but we could make it up as well)
    • Assume a 1000 character data block (8000 bits)
    • Assume 48 control bits.
    • This is 8048 bits, 48/8048 = .006 or .6% overhead.
• Classifying errors
  • A single bit flipped is called single-bit error.
    • Most likely be due to white noise
  • A burst error
    • For a set of B bits
    • The first bit and the last bit are in error.
    • Intermediate bits are not classified.
    • Most likely from impulse noise.
  • Burst errors increase as the data rate goes up.
  • Stallings gives us an example (again we could make this up)
    • Assume an impulse noise event of 1μs
    • At 10Mbps this is 10x10⁶b/sec x 1x10^-6 s = 10 bits
    • At 100Mbps this is 100x10⁶b/sec x 1x10^-6 s = 100 bits
• Error Detection
  • Stallings gives us a way to model the probability of an error in a transmitted frame.
  • P_b is the bit error rate, or the probability that a single bit is received in error.
  • P₁ is the probability that a frame arrives with no errors.
  • P₁ = (1-P_b)^F, where F is the number of bits in the frame.
  • P₂ is the probability that a frame arrives with an undetected error.
  • P₂ = 1-P₁
  • Stallings gives an example on how this is important.

    Assume a 64kbps ISDN line with frame size of 1000 bits.
    
    The frame rate is  64x103bits/second x 1 frame = 64 frames/second
    
    In a day, we can have 
        64 frames/sec x 60 sec/min x 60 min/hour x 24 hour/day = 5.529x106 frames/day
    
    Assume we only 1 frame/day in error is acceptable.
    This doesn't count frames we detect errors in. 
    P2 = 1/ 5.529x106 = 0.18x10-6
    
    Assume a BER of 10-6
    Then P1 = (1-10-6)1000= .9990
    
    And P2= (1-P1) = .001 = 1x10-3
    
    Note the actual P2 is 1000 times larger than the acceptable P2
    	

  • This motivates error detection/correction.
  • To do this, error detecting code bits are added by the transmitter.
  • The block received is checked against these bits by the receiver to see if the message was in error.
  • This is generally done by allowing a block of n bits,
  • For a frame of n bits
  • And a data field of k bits
  • There are n-k bits for error detection, n-k small.
  • 
  • In this case, the transmitter computes E and adds it to the frame
  • The receiver recalculates E and compares it to the E received.
  • If they match, the frame is declared to not be in error.
  • If they don't the frame is declared to be in error.
  • Frames can be accepted with errors. The rate at which this occurs is the residual error rate.
• Parity check.
  • One technique
  • Stallings says even is often used for synchronous
  • Odd is often used for asynchronism.
• CRC checks.
  • cyclic redundancy check
  • Generates a frame check sequence (FCS) to be appended to the frame.
    • if a/b = q*b+r
    • let F = data (cat) fcs
    • For some bit pattern P
    • data/P = q*P + 0, ie there is no remainder.
  • To make this quick, they do modulo 2 arithmetic.
    • at a bit level a+b = a xor b
    • Also at a bit level a-b = a xor b
    • Essentially perform the operation without carry bits.
  • Some notation
    • Let T be the n bit frame to be transmitted.
    • Let D be the k bit data of the message
    • Let F = (n-k) be the FCS
    • Let P be a pattern of n-k+1 bits for the CRC Check.

    T = 2n-kD+F
    Let (2n-lD)/P = Q + R/P
    Let F = R.
    Then T = 2n-kD+R
    T/P then =  (2n-lD + R)/P = (2n-kD)/P + R/P
    But we know T = 2n-kD+R, so T/P = (Q + R/P) + R/P 
                  = Q + 2R/P
    Stallings tells us that 2R/P = 0 in mod 2 arithmetic.
                 So Q+2R/P = Q
    	 

  • He works thorough an example, which you should do on your own.
  • CRC as Polynomial
    • The bit pattern P = 110101
    • Can be expressed as the polynomial X⁵+X⁴+X²+X⁰
    • There are apparently a number of P(X) values defined
      • CRC-16 = X¹⁶+X¹⁵+X²+1 is for 8 bit character data.
      • CRC-32 = X^{(32, 26, 23, 22, 16, 12, 11, 10,, 8, 7, 5, 4, 2, 1, 0)} is used for IEEE 802 standards.
    • Stallings lists a number of findings that state what errors will be detected under what conditions.
      • All single bit errors if P(X) has one non-zero term
      • All double bit errors if P(X) meets certain requirements.
      • All Odd number of errors if P(X) contains (X-1) as a factor
      • Any burst errors where the length of the burst is less than n-k
      • A fraction of burst errors length n-k+1
  • Stallings gives us a hardware circuit to perform CRC Check.
  • More on this next time.
• Line Configurations
  • Topology - they physical arrangement of the devices on the transmission media.
  • 2 stations directly connected is called point to point.
  • More than two machines on a link is called multipoint.
  • Multipoint works when the network is not busy.
  • It is less costly in terms of media.
    • Point to point requires much more media.
    • And more ports on the network devices.
  • he discusses full duplex and half duplex again.