//: version "2.0-b10"
//: property encoding = "iso8859-1"
//: property locale = "en"
//: property prefix = "_GG"
//: property timingViolationMode = 2
//: property initTime = "0 ns"

`timescale 1ns/1ns

//: /netlistBegin main
module main;    //: root_module
reg w6;    //: /sn:0 {0}(233,132)(212,132)(212,105)(186,105){1}
reg w7;    //: /sn:0 {0}(110,100)(81,100){1}
reg w3;    //: /sn:0 {0}(168,385)(191,385)(191,416){1}
//: {2}(189,418)(169,418){3}
//: {4}(191,420)(191,464){5}
//: {6}(189,466)(169,466){7}
//: {8}(191,468)(191,509){9}
//: {10}(189,511)(169,511){11}
//: {12}(191,513)(191,558)(170,558){13}
reg [1:0] w21;    //: /sn:0 {0}(#:273,560)(273,515){1}
reg w1;    //: /sn:0 {0}(186,95)(214,95)(214,78)(229,78){1}
reg [7:0] w25;    //: /sn:0 {0}(#:86,391)(86,401){1}
//: {2}(#:88,403)(130,403)(130,413){3}
//: {4}(86,405)(86,447){5}
//: {6}(#:88,449)(130,449)(130,461){7}
//: {8}(86,451)(86,502){9}
//: {10}(#:88,504)(130,504)(130,506){11}
//: {12}(86,506)(86,546)(131,546)(131,553){13}
reg w8;    //: /sn:0 {0}(64,560)(44,560)(44,515){1}
//: {2}(46,513)(63,513){3}
//: {4}(44,511)(44,470){5}
//: {6}(46,468)(63,468){7}
//: {8}(44,466)(44,422){9}
//: {10}(46,420)(63,420){11}
//: {12}(42,420)(5,420)(5,416){13}
reg [1:0] w11;    //: /sn:0 {0}(-9,479)(-21,479)(#:-21,447){1}
reg w12;    //: /sn:0 {0}(202,383)(202,426){1}
//: {2}(200,428)(169,428){3}
//: {4}(202,430)(202,474){5}
//: {6}(200,476)(169,476){7}
//: {8}(202,478)(202,519){9}
//: {10}(200,521)(169,521){11}
//: {12}(202,523)(202,568)(170,568){13}
reg w13;    //: /sn:0 {0}(4,501)(4,515)(-7,515){1}
reg [7:0] w5;    //: /sn:0 {0}(#:147,53)(147,90){1}
wire w32;    //: /sn:0 {0}(85,563)(94,563){1}
wire w14;    //: /sn:0 {0}(63,473)(20,473){1}
wire w4;    //: /sn:0 {0}(64,565)(30,565)(30,497)(20,497){1}
wire w19;    //: /sn:0 {0}(63,518)(35,518)(35,485)(20,485){1}
wire [7:0] w15;    //: /sn:0 {0}(#:130,527)(130,536)(215,536)(215,498)(257,498){1}
wire [7:0] w0;    //: /sn:0 {0}(147,158)(#:147,111){1}
wire w24;    //: /sn:0 {0}(93,471)(84,471){1}
wire [7:0] w20;    //: /sn:0 {0}(#:131,574)(131,591)(225,591)(225,510)(257,510){1}
wire w18;    //: /sn:0 {0}(84,423)(93,423){1}
wire [7:0] w2;    //: /sn:0 {0}(#:130,434)(130,442)(215,442)(215,474)(257,474){1}
wire [7:0] w10;    //: /sn:0 {0}(#:130,482)(130,486)(257,486){1}
wire [7:0] w27;    //: /sn:0 {0}(#:286,492)(308,492)(308,462){1}
wire w29;    //: /sn:0 {0}(93,516)(84,516){1}
wire w9;    //: /sn:0 {0}(63,425)(28,425)(28,461)(20,461){1}
//: enddecls

  _GGREG8 #(10, 10, 20) g8 (.Q(w15), .D(w25), .EN(w12), .CLR(w3), .CK(w29));   //: @(130,516) /sn:0 /w:[ 0 11 11 11 0 ]
  //: SWITCH g4 (w6) @(251,132) /sn:0 /R:2 /w:[ 0 ] /st:0 /dn:1
  //: joint g13 (w25) @(86, 403) /w:[ 2 1 -1 4 ]
  //: SWITCH g3 (w1) @(247,78) /sn:0 /R:2 /w:[ 1 ] /st:0 /dn:1
  //: DIP g2 (w5) @(147,43) /sn:0 /w:[ 0 ] /st:0 /dn:1
  //: DIP ReadRegister1 (w21) @(273,571) /R:2 /w:[ 0 ] /st:1 /dn:0
  //: LED g1 (w0) @(147,165) /sn:0 /R:2 /w:[ 0 ] /type:3
  _GGDECODER4 #(6, 6) g16 (.I(w11), .E(w13), .Z0(w4), .Z1(w19), .Z2(w14), .Z3(w9));   //: @(4,479) /sn:0 /R:1 /w:[ 0 0 1 1 1 1 ] /ss:0 /do:0
  //: joint g11 (w25) @(86, 504) /w:[ 10 9 -1 12 ]
  //: comment g10 @(-49,330) /sn:0
  //: /line:"This is a four register register file."
  //: /end
  _GGAND2 #(6) g28 (.I0(w8), .I1(w9), .Z(w18));   //: @(74,423) /sn:0 /w:[ 11 0 0 ]
  //: joint g32 (w8) @(44, 468) /w:[ 6 8 -1 5 ]
  //: joint g27 (w8) @(44, 513) /w:[ 2 4 -1 1 ]
  //: joint g19 (w12) @(202, 428) /w:[ -1 1 2 4 ]
  _GGREG8 #(10, 10, 20) g6 (.Q(w2), .D(w25), .EN(w12), .CLR(w3), .CK(w18));   //: @(130,423) /sn:0 /w:[ 0 3 3 3 1 ]
  _GGREG8 #(10, 10, 20) g9 (.Q(w20), .D(w25), .EN(w12), .CLR(w3), .CK(w32));   //: @(131,563) /sn:0 /w:[ 0 13 13 13 1 ]
  _GGREG8 #(10, 10, 20) g7 (.Q(w10), .D(w25), .EN(w12), .CLR(w3), .CK(w24));   //: @(130,471) /sn:0 /w:[ 0 7 7 7 0 ]
  //: comment g15 @(47,-2) /sn:0
  //: /line:"The basic operation of a register"
  //: /line:""
  //: /end
  _GGAND2 #(6) g31 (.I0(w8), .I1(w4), .Z(w32));   //: @(75,563) /sn:0 /w:[ 0 0 0 ]
  //: joint g20 (w3) @(191, 511) /w:[ -1 9 10 12 ]
  _GGAND2 #(6) g29 (.I0(w8), .I1(w14), .Z(w24));   //: @(74,471) /sn:0 /w:[ 7 0 1 ]
  //: joint g17 (w12) @(202, 521) /w:[ -1 9 10 12 ]
  //: SWITCH Enable (w12) @(202,370) /R:3 /w:[ 0 ] /st:0 /dn:0
  _GGMUX4x8 #(12, 12) g14 (.I0(w20), .I1(w15), .I2(w10), .I3(w2), .S(w21), .Z(w27));   //: @(273,492) /sn:0 /R:1 /w:[ 1 1 1 1 1 0 ] /ss:0 /do:0
  //: SWITCH g5 (w7) @(64,100) /sn:0 /w:[ 1 ] /st:0 /dn:1
  //: joint g21 (w3) @(191, 466) /w:[ -1 5 6 8 ]
  //: LED g23 (w27) @(308,455) /sn:0 /w:[ 1 ] /type:2
  //: DIP WriteData (w25) @(86,381) /w:[ 0 ] /st:16 /dn:0
  //: SWITCH g26 (w13) @(-24,515) /sn:0 /w:[ 1 ] /st:1 /dn:0
  //: joint g22 (w3) @(191, 418) /w:[ -1 1 2 4 ]
  _GGREG8 #(10, 10, 20) g0 (.Q(w0), .D(w5), .EN(w6), .CLR(w1), .CK(w7));   //: @(147,100) /sn:0 /w:[ 1 1 1 0 0 ]
  //: SWITCH RegWrite (w8) @(5,403) /R:3 /w:[ 13 ] /st:0 /dn:0
  //: DIP WriteRegister (w11) @(-21,437) /w:[ 1 ] /st:1 /dn:0
  //: joint g18 (w12) @(202, 476) /w:[ -1 5 6 8 ]
  //: joint g12 (w25) @(86, 449) /w:[ 6 5 -1 8 ]
  //: joint g33 (w8) @(44, 420) /w:[ 10 -1 12 9 ]
  _GGAND2 #(6) g30 (.I0(w8), .I1(w19), .Z(w29));   //: @(74,516) /sn:0 /w:[ 3 0 1 ]
  //: SWITCH CLEAR (w3) @(151,385) /w:[ 0 ] /st:1 /dn:0

endmodule
//: /netlistEnd