Memory Overview

• Memory is organized as nxm mememory cells
  • n is the minimaly addressable memory size (usually byte)
  • n datalines are required to send/retrieve data from the memory
  • m is the total number of addresses
  • lg(m) address lines are required to address this memory
• Additional control lines
  • Chip Select (CS) - this line tells memory we are ready to perform an action.
  • All other lines must be stabalized before we raise this line
  • Memory Done (MD) - Memory raises this line to indicate that the requested operation has been performed, and memory is ready to for a new transaction
  • Read/Write' (RW') (Read not write) - indicates the operation we wish to perform. 1 - read, 2 - write.
• Operations
  • Read
    • Place the address on the address lines
    • Raise the RW' line
    • Raise CS
    • Wait until MD
    • Read data from the data lines
  • Write
    • Place the address on the address lines
    • Place the data on the data lines
    • Raise the CS line
    • Wait until MD
  • The MMU (memory management unit) is usually responsible for this
    • Two associated registers
      • MAR - memory address register
      • MDR - memory data register
    • Control lines
      • loadmar (load the mar from the bus)
      • loadmbr (load the mbr)
      • bustombr (put the bus on the mbr, otherwise it comes from memory)
      • mbrotbus (put the mbr on the bus)
      • mbrtomem (send the mbr to memory)
    • To load an item from memory
      • Send the address to the mar
      • loadmar
      • raise rw' and cs
      • wait for md
      • loadmbr
      • mbrtobus
    • to save an item to memory
      • send the address to the mar
      • loadmar
      • send the data to the mbr
      • bustombr
      • loadmbr
      • mbrtomem
      • raise cs
      • wait for md
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  • Some additional notes
    • Memory is not necessairly butilt from flipflops, there are other circuits
    • Memory is much slower than the CPU.
    • Memory is not necessairly byte addressable, we will deal with memory as word addressable for a while.

• The PC just for the record
  • Assume we have 2¹² memory locations
  • The register is 12 bits.
  • Control lines
    • loadpc
    • bustopc
    • pctobus
    • reset
  • Data Lines
    • BUSTOPC (16 bits for some reason)
    • PCTOBUS (16 bits for some reason)
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