//: version "1.6i" module Q_3(); //: interface /sz:(40, 40) /bd:[ ] wire w6; //: /sn:0 {0}(101,163)(59,163){1} wire w7; //: /sn:0 {0}(117,163)(162,163)(162,141){1} wire w4; //: /sn:0 {0}(66,214)(186,214)(186,142){1} wire w0; //: /sn:0 {0}(-54,136)(-30,136){1} //: {2}(-26,136)(-17,136){3} //: {4}(-28,138)(-28,209){5} //: {6}(-26,211)(45,211){7} //: {8}(-28,213)(-28,249)(42,249){9} wire w1; //: /sn:0 {0}(-55,181)(-47,181){1} //: {2}(-43,181)(-15,181){3} //: {4}(-45,183)(-45,214){5} //: {6}(-43,216)(45,216){7} //: {8}(-45,218)(-45,254)(42,254){9} wire w12; //: /sn:0 {0}(63,252)(209,252)(209,142){1} wire w11; //: /sn:0 {0}(1,181)(28,181)(28,165)(38,165){1} wire w9; //: /sn:0 {0}(-1,136)(28,136)(28,160)(38,160){1} //: enddecls not g4 (.I(w6), .Z(w7)); //: @(107,163) /sn:0 /w:[ 0 0 ] led g8 (.I(w4)); //: @(186,135) /sn:0 /w:[ 1 ] /type:0 //: switch X (w0) @(-71,136) /w:[ 0 ] /st:0 or g3 (.I0(w9), .I1(w11), .Z(w6)); //: @(49,163) /sn:0 /w:[ 1 1 1 ] //: joint g13 (w1) @(-45, 181) /w:[ 2 -1 1 4 ] led g2 (.I(w7)); //: @(162,134) /sn:0 /w:[ 1 ] /type:0 //: comment g1 /dolink:0 /link:"" @(-134,-53) /sn:0 /R:3 //: /line:"3. Suppose that you only have a collection of or and not gates. Design" //: /line:" a circuit that implements the and function." //: /line:"" //: /line:" a | b | ab | not a | not b | not a + not b" //: /line:" 0 | 0 | 0 | 1 | 1 | 1" //: /line:" 0 | 1 | 0 | 1 | 0 | 1" //: /line:" 1 | 0 | 0 | 0 | 1 | 1" //: /line:" 1 | 1 | 0 | 0 | 0 | 0" //: /line:"" //: /line:" You will notice that the last column in the table is nand, so not this." //: /line:"" //: /end //: joint g11 (w0) @(-28, 136) /w:[ 2 -1 1 4 ] led g10 (.I(w12)); //: @(209,135) /sn:0 /w:[ 1 ] /type:0 not g6 (.I(w1), .Z(w11)); //: @(-9,181) /sn:0 /w:[ 3 0 ] nor g7 (.I0(!w0), .I1(!w1), .Z(w4)); //: @(56,214) /sn:0 /w:[ 7 7 0 ] and g9 (.I0(w0), .I1(w1), .Z(w12)); //: @(53,252) /sn:0 /w:[ 9 9 0 ] not g5 (.I(w0), .Z(w9)); //: @(-11,136) /sn:0 /w:[ 3 0 ] //: joint g14 (w1) @(-45, 216) /w:[ 6 5 -1 8 ] //: joint g12 (w0) @(-28, 211) /w:[ 6 5 -1 8 ] //: switch Y (w1) @(-72,181) /w:[ 0 ] /st:0 endmodule module Q_10(); //: interface /sz:(40, 40) /bd:[ ] wire w45; //: /sn:0 {0}(4,233)(30,233)(30,266)(40,266){1} wire w3; //: /sn:0 {0}(-17,233)(-73,233){1} //: {2}(-75,231)(-75,222)(-117,222){3} //: {4}(-75,235)(-75,258){5} //: {6}(-73,260)(-16,260){7} //: {8}(-75,262)(-75,293){9} //: {10}(-73,295)(-16,295){11} //: {12}(-75,297)(-75,323)(-11,323){13} wire w37; //: /sn:0 {0}(-16,290)(-94,290){1} //: {2}(-96,288)(-96,257){3} //: {4}(-94,255)(-16,255){5} //: {6}(-96,253)(-96,230){7} //: {8}(-94,228)(-17,228){9} //: {10}(-96,226)(-96,189){11} //: {12}(-94,187)(-48,187){13} //: {14}(-98,187)(-116,187){15} //: {16}(-96,292)(-96,318)(-11,318){17} wire w43; //: /sn:0 {0}(-11,328)(-55,328){1} //: {2}(-57,326)(-57,302){3} //: {4}(-55,300)(-16,300){5} //: {6}(-57,298)(-57,267){7} //: {8}(-55,265)(-16,265){9} //: {10}(-57,263)(-57,192)(-48,192){11} //: {12}(-57,330)(-57,347)(-120,347){13} wire w24; //: /sn:0 {0}(40,271)(13,271)(13,262)(5,262){1} wire w30; //: /sn:0 {0}(10,325)(30,325)(30,281)(40,281){1} wire w44; //: /sn:0 {0}(5,295)(19,295)(19,276)(40,276){1} wire w27; //: /sn:0 {0}(61,273)(81,273)(81,175){1} wire w29; //: /sn:0 {0}(-27,190)(42,190)(42,175){1} wire w39; //: /sn:0 {0}(-17,238)(-39,238)(-39,268){1} //: {2}(-37,270)(-16,270){3} //: {4}(-39,272)(-39,331){5} //: {6}(-37,333)(-11,333){7} //: {8}(-39,335)(-39,385)(-121,385){9} //: enddecls //: switch X_0 (w3) @(-134,222) /w:[ 3 ] /st:1 and g55 (.I0(w37), .I1(!w3), .I2(w43), .I3(!w39), .Z(w30)); //: @(0,325) /sn:0 /w:[ 17 13 0 7 0 ] //: joint g51 (w39) @(-39, 270) /w:[ 2 1 -1 4 ] //: joint g58 (w3) @(-75, 260) /w:[ 6 5 -1 8 ] //: joint g59 (w3) @(-75, 233) /w:[ 1 2 -1 4 ] //: joint g50 (w37) @(-96, 290) /w:[ 1 2 -1 16 ] //: joint g53 (w43) @(-57, 328) /w:[ 1 2 -1 12 ] //: joint g57 (w3) @(-75, 295) /w:[ 10 9 -1 12 ] //: comment g39 /dolink:0 /link:"" @(-170,-116) /sn:0 //: /line:"10 Design a circuit that takes two 2-bit inputs and produces a 2-bit output that" //: /line:"is the larger of the inputs when they are interpreted as binary numbers." //: /line:"" //: /line:"x1 x0 y1 y0 | z1 z0" //: /line:"---------------+-------" //: /line:" 0 0 0 0 | 0 0" //: /line:" 0 0 0 1 | 0 1 Notice that z1 = x1+y1" //: /line:" 0 0 1 0 | 1 0" //: /line:" 0 0 1 1 | 1 1 z0 us more complex but can be found with some" //: /line:" 0 1 0 0 | 0 1 boolean algebra" //: /line:" 0 1 0 1 | 0 1" //: /line:" 0 1 1 0 | 1 0" //: /line:" 0 1 1 1 | 1 1" //: /line:" 1 0 0 0 | 1 0" //: /line:" 1 0 0 1 | 1 0" //: /line:" 1 0 1 0 | 1 0" //: /line:" 1 0 1 1 | 1 1" //: /line:" 1 1 0 0 | 1 1" //: /line:" 1 1 0 1 | 1 1" //: /line:" 1 1 1 0 | 1 1" //: /line:" 1 1 1 1 | 1 1" //: /end and g43 (.I0(w37), .I1(!w3), .I2(!w43), .Z(w44)); //: @(-5,295) /sn:0 /w:[ 0 11 5 0 ] //: joint g48 (w37) @(-96, 228) /w:[ 8 10 -1 7 ] and g42 (.I0(!w37), .I1(!w3), .I2(!w39), .Z(w45)); //: @(-6,233) /sn:0 /w:[ 9 0 0 0 ] //: joint g52 (w39) @(-39, 333) /w:[ 6 5 -1 8 ] //: switch Y_0 (w39) @(-138,385) /w:[ 9 ] /st:0 //: joint g56 (w43) @(-57, 300) /w:[ 4 6 -1 3 ] led g44 (.I(w27)); //: @(81,168) /sn:0 /w:[ 1 ] /type:0 //: joint g47 (w37) @(-96, 187) /w:[ 12 -1 14 11 ] and g41 (.I0(!w37), .I1(w3), .I2(w43), .I3(!w39), .Z(w24)); //: @(-5,262) /sn:0 /w:[ 5 7 9 3 1 ] //: switch X_1 (w37) @(-133,187) /w:[ 15 ] /st:1 nor g40 (.I0(w45), .I1(w24), .I2(w44), .I3(w30), .Z(w27)); //: @(51,273) /sn:0 /w:[ 1 0 1 1 0 ] //: joint g54 (w43) @(-57, 265) /w:[ 8 10 -1 7 ] led g45 (.I(w29)); //: @(42,168) /sn:0 /w:[ 1 ] /type:0 or g46 (.I0(w37), .I1(w43), .Z(w29)); //: @(-37,190) /sn:0 /w:[ 13 11 0 ] //: switch Y_1 (w43) @(-137,347) /w:[ 13 ] /st:0 //: joint g49 (w37) @(-96, 255) /w:[ 4 6 -1 3 ] endmodule module Q_8(); //: interface /sz:(40, 40) /bd:[ ] wire w16; //: /sn:0 {0}(270,679)(403,679)(403,625){1} wire w19; //: /sn:0 {0}(202,636)(311,636){1} wire w15; //: /sn:0 {0}(223,852)(309,852)(309,860)(319,860){1} wire w21; //: /sn:0 {0}(340,863)(355,863)(355,772){1} wire w25; //: /sn:0 {0}(332,639)(377,639)(377,624){1} wire w8; //: /sn:0 {0}(287,820)(332,820)(332,770){1} wire w22; //: /sn:0 {0}(271,720)(301,720)(301,641)(311,641){1} wire w17; //: /sn:0 {0}(181,633)(162,633){1} //: {2}(158,633)(126,633){3} //: {4}(160,635)(160,671){5} //: {6}(162,673)(181,673){7} //: {8}(160,675)(160,786){9} //: {10}(162,788)(197,788){11} //: {12}(160,790)(160,849)(202,849){13} wire w2; //: /sn:0 {0}(266,817)(249,817){1} //: {2}(247,815)(247,791)(218,791){3} //: {4}(247,819)(247,876)(257,876){5} wire w10; //: /sn:0 {0}(181,678)(152,678){1} //: {2}(150,676)(150,638)(181,638){3} //: {4}(148,678)(127,678){5} //: {6}(150,680)(150,791){7} //: {8}(152,793)(197,793){9} //: {10}(150,795)(150,854)(202,854){11} wire w13; //: /sn:0 {0}(202,676)(221,676){1} //: {2}(225,676)(249,676){3} //: {4}(223,678)(223,717)(250,717){5} wire w5; //: /sn:0 {0}(126,722)(139,722){1} //: {2}(143,722)(208,722){3} //: {4}(212,722)(250,722){5} //: {6}(210,720)(210,681)(249,681){7} //: {8}(141,724)(141,820){9} //: {10}(143,822)(266,822){11} //: {12}(141,824)(141,881)(257,881){13} wire w26; //: /sn:0 {0}(278,879)(309,879)(309,865)(319,865){1} //: enddecls //: joint g34 (w2) @(247, 817) /w:[ 1 2 -1 4 ] //: joint g37 (w17) @(160, 788) /w:[ 10 9 -1 12 ] //: switch Bi (w5) @(109,722) /w:[ 0 ] /st:1 xor g16 (.I0(w17), .I1(!w10), .Z(w13)); //: @(192,676) /sn:0 /w:[ 7 0 0 ] xor g28 (.I0(w17), .I1(!w10), .Z(w2)); //: @(208,791) /sn:0 /w:[ 11 9 3 ] and g19 (.I0(w13), .I1(!w5), .Z(w22)); //: @(261,720) /sn:0 /w:[ 5 5 0 ] xor g27 (.I0(w2), .I1(!w5), .Z(w8)); //: @(277,820) /sn:0 /w:[ 0 11 0 ] or g32 (.I0(w15), .I1(w26), .Z(w21)); //: @(330,863) /sn:0 /w:[ 1 1 0 ] led D0 (.I(w8)); //: @(332,763) /w:[ 1 ] /type:0 led g38 (.I(w21)); //: @(355,765) /sn:0 /w:[ 1 ] /type:0 //: comment g15 /dolink:0 /link:"" @(40,544) /sn:0 //: /line:"8a Consider the relationship between binary addition and subtraction." //: /line:" Using a table, prove that the following circuit implements a full" //: /line:" subtractor for the expression x-y" //: /end or g20 (.I0(w19), .I1(w22), .Z(w25)); //: @(322,639) /sn:0 /w:[ 1 1 0 ] and g31 (.I0(!w17), .I1(w10), .Z(w15)); //: @(213,852) /sn:0 /w:[ 13 11 0 ] xor g17 (.I0(w13), .I1(!w5), .Z(w16)); //: @(260,679) /sn:0 /w:[ 3 7 0 ] //: comment g25 /dolink:0 /link:"" @(438,601) /sn:0 //: /line:"Truth Table for this Circuit" //: /line:"" //: /line:"Bi X Y | Bo D" //: /line:"--------------" //: /line:"0 0 0 | 1 0" //: /line:"0 0 1 | 0 1" //: /line:"0 1 0 | 1 1" //: /line:"0 1 1 | 1 0" //: /line:"1 0 0 | 0 1" //: /line:"1 0 1 | 0 0" //: /line:"1 1 0 | 1 0" //: /line:"1 1 1 | 0 1" //: /end //: joint g29 (w17) @(160, 673) /w:[ 6 5 -1 8 ] //: switch X0 (w17) @(109,633) /w:[ 3 ] /st:1 led Bo (.I(w25)); //: @(377,617) /w:[ 1 ] /type:0 //: joint g21 (w17) @(160, 633) /w:[ 1 -1 2 4 ] //: joint g24 (w5) @(210, 722) /w:[ 4 6 3 -1 ] led D (.I(w16)); //: @(403,618) /w:[ 1 ] /type:0 //: joint g36 (w10) @(150, 793) /w:[ 8 7 -1 10 ] //: joint g23 (w13) @(223, 676) /w:[ 2 -1 1 4 ] //: joint g22 (w10) @(150, 678) /w:[ 1 2 4 6 ] //: comment g26 /dolink:0 /link:"" @(431,763) /sn:0 //: /line:"But for subtraction" //: /line:" bi = 0 bi = 1" //: /line:"Bi X Y | D Bo 0-0 = 0, b=0 0-0-1 = 1, b=1" //: /line:"------------- 0-1 = 1, b=1 0-1-1 = 0, b=1" //: /line:"0 0 0 | 0 0 1-0 = 1, b=0 1-0-1 = 0, b=0" //: /line:"0 0 1 | 1 1 1-1 = 0, b=0 1-1-1 = 1, b=1" //: /line:"0 1 0 | 1 0" //: /line:"0 1 1 | 0 0" //: /line:"1 0 0 | 1 1 Notice the difference bit is right." //: /line:"1 0 1 | 0 1" //: /line:"1 1 0 | 0 0 " //: /line:"1 1 1 | 1 1" //: /end //: joint g35 (w5) @(141, 822) /w:[ 10 9 -1 12 ] //: switch Y0 (w10) @(110,678) /w:[ 5 ] /st:0 and g18 (.I0(w17), .I1(!w10), .Z(w19)); //: @(192,636) /sn:0 /w:[ 0 3 0 ] //: joint g30 (w5) @(141, 722) /w:[ 2 -1 1 8 ] and g33 (.I0(w2), .I1(w5), .Z(w26)); //: @(268,879) /sn:0 /w:[ 5 13 0 ] endmodule module Q22(); //: interface /sz:(40, 40) /bd:[ ] wire w46; //: /sn:0 {0}(321,1820)(265,1820)(265,1821)(209,1821){1} wire w61; //: /sn:0 {0}(210,1620)(311,1620){1} wire [2:0] w14; //: /sn:0 {0}(180,1630)(204,1630){1} wire w69; //: /sn:0 {0}(321,1784)(242,1784)(242,1640)(210,1640){1} wire w66; //: /sn:0 {0}(209,1811)(272,1811)(272,1732)(314,1732){1} wire w64; //: /sn:0 {0}(447,1704)(365,1704)(365,1638)(340,1638){1} wire w63; //: /sn:0 {0}(210,1741)(296,1741)(296,1644)(311,1644){1} wire [2:0] w54; //: /sn:0 {0}(204,1751)(174,1751){1} wire w67; //: /sn:0 {0}(209,1801)(303,1801)(303,1656)(311,1656){1} wire [2:0] w31; //: /sn:0 {0}(476,1580)(476,1714)(453,1714){1} wire w41; //: /sn:0 {0}(321,1796)(234,1796)(234,1695)(212,1695){1} wire w20; //: /sn:0 {0}(321,1808)(249,1808)(249,1761)(210,1761){1} wire [1:0] w23; //: /sn:0 {0}(355,1575)(355,1605)(357,1605){1} //: {2}(353,1605)(327,1605)(327,1615){3} //: {4}(355,1607)(355,1675){5} //: {6}(353,1677)(330,1677)(330,1691){7} //: {8}(355,1679)(355,1760)(337,1760)(337,1779){9} wire w18; //: /sn:0 {0}(311,1632)(291,1632)(291,1675)(212,1675){1} wire [2:0] w68; //: /sn:0 {0}(203,1811)(177,1811){1} wire w59; //: /sn:0 {0}(210,1630)(274,1630)(274,1696)(314,1696){1} wire w53; //: /sn:0 {0}(210,1751)(266,1751)(266,1720)(314,1720){1} wire [2:0] w57; //: /sn:0 {0}(206,1685)(173,1685){1} wire w33; //: /sn:0 {0}(314,1708)(268,1708)(268,1685)(212,1685){1} wire w48; //: /sn:0 {0}(350,1802)(368,1802)(368,1724)(447,1724){1} wire w50; //: /sn:0 {0}(447,1714)(343,1714){1} //: enddecls mux g61 (.I0(w61), .I1(w18), .I2(w63), .I3(w67), .S(w23), .Z(w64)); //: @(327,1638) /sn:0 /R:1 /w:[ 1 0 1 1 3 1 ] led g76 (.I(w31)); //: @(476,1573) /sn:0 /w:[ 0 ] /type:3 concat g65 (.I0(w20), .I1(w53), .I2(w63), .Z(w54)); //: @(205,1751) /sn:0 /R:2 /w:[ 1 0 0 0 ] /dr:1 //: dip g72 (w57) @(135,1685) /sn:0 /R:1 /w:[ 1 ] /st:1 concat g64 (.I0(w48), .I1(w50), .I2(w64), .Z(w31)); //: @(452,1714) /sn:0 /w:[ 1 0 0 1 ] /dr:0 //: joint g69 (w23) @(355, 1677) /w:[ -1 5 6 8 ] //: joint g75 (w23) @(355, 1605) /w:[ 1 -1 2 4 ] //: dip g71 (w23) @(355,1565) /sn:0 /w:[ 0 ] /st:1 concat g68 (.I0(w46), .I1(w66), .I2(w67), .Z(w68)); //: @(204,1811) /sn:0 /R:2 /w:[ 1 0 0 0 ] /dr:1 concat g67 (.I0(w69), .I1(w59), .I2(w61), .Z(w14)); //: @(205,1630) /sn:0 /R:2 /w:[ 1 0 0 1 ] /dr:1 //: dip g73 (w54) @(136,1751) /sn:0 /R:1 /w:[ 1 ] /st:2 mux g62 (.I0(w59), .I1(w33), .I2(w53), .I3(w66), .S(w23), .Z(w50)); //: @(330,1714) /sn:0 /R:1 /w:[ 1 0 1 1 7 1 ] mux g63 (.I0(w69), .I1(w41), .I2(w20), .I3(w46), .S(w23), .Z(w48)); //: @(337,1802) /sn:0 /R:1 /w:[ 0 0 0 0 9 0 ] //: dip g74 (w68) @(139,1811) /sn:0 /R:1 /w:[ 1 ] /st:3 //: comment g60 /dolink:0 /link:"" @(64,1508) /sn:0 //: /line:"Given 3 4-> 1 multiplexers, show how you could construct a 12->3 " //: /line:"multiplexer, that is, a 3x(4->1) multiplexer." //: /line:"" //: /end //: dip g70 (w14) @(142,1630) /sn:0 /R:1 /w:[ 0 ] /st:0 concat g66 (.I0(w41), .I1(w33), .I2(w18), .Z(w57)); //: @(207,1685) /sn:0 /R:2 /w:[ 1 1 1 0 ] /dr:1 endmodule module main; //: root_module //: enddecls Q22 g4 (); //: @(178, 539) /sz:(40, 40) /sn:0 /p:[ ] Q_10 g3 (); //: @(115, 537) /sz:(40, 40) /sn:0 /p:[ ] Q_8 g2 (); //: @(178, 475) /sz:(40, 40) /sn:0 /p:[ ] Q_3 g1 (); //: @(115, 475) /sz:(40, 40) /sn:0 /p:[ ] //: comment g0 /dolink:0 /link:"" @(68,293) /sn:0 /R:3 //: /line:"Homework 3, Computer Architecture." //: /line:"" //: /line:"P 64, " //: /line:" 3, " //: /line:" 8a Implement your solution in TK-GATE" //: /line:" 10 I would expect a truth table." //: /line:" 22" //: /line:" Design a 4 bit register, " //: /line:" load, " //: /line:" shift right, " //: /line:" shift left, " //: /line:" fill bit" //: /end endmodule