//: version "1.6g"

module main;    //: root_module
wire [3:0] X;    //: /sn:0 /dp:5 {0}(5,-9)(22,-9)(22,34){1}
//: {2}(20,36)(-45,36){3}
//: {4}(22,38)(22,77)(69,77){5}
wire [3:0] w4;    //: /sn:0 /dp:1 {0}(-61,36)(-138,36)(-138,-63){1}
wire w0;    //: /sn:0 /dp:1 {0}(-40,147)(-40,53)(-199,53)(-199,-119)(-92,-119){1}
//: {2}(-88,-119)(115,-119)(115,-87){3}
//: {4}(117,-85)(146,-85){5}
//: {6}(113,-85)(85,-85){7}
//: {8}(-90,-117)(-90,-7)(-53,-7)(-53,31){9}
wire [3:0] R;    //: /sn:0 /dp:1 {0}(-49,205)(-59,205)(-59,250)(84,250){1}
wire w12;    //: /sn:0 /dp:1 {0}(-3,-14)(-3,-42)(183,-42)(183,-83){1}
//: {2}(183,-87)(183,-134)(-217,-134)(-217,178)(-43,178){3}
//: {4}(-39,178)(104,178)(104,195){5}
//: {6}(-41,180)(-41,200){7}
//: {8}(181,-85)(162,-85){9}
wire [3:0] w10;    //: /sn:0 {0}(-32,-63)(-32,-9)(-11,-9){1}
wire [3:0] S;    //: /sn:0 /dp:1 {0}(126,244)(160,244)(160,88){1}
//: {2}(162,86)(228,86)(228,21){3}
//: {4}(158,86)(137,86){5}
wire [3:0] w9;    //: /sn:0 {0}(-117,114)(-117,152)(-48,152){1}
wire [3:0] Y;    //: /sn:0 /dp:3 {0}(-33,205)(45,205)(45,154){1}
//: {2}(45,150)(45,95)(69,95){3}
//: {4}(43,152)(-32,152){5}
//: enddecls

  //: joint g4 (S) @(160, 86) /w:[ 2 -1 4 1 ]
  //: joint g8 (X) @(22, 36) /w:[ -1 1 2 4 ]
  //: joint g13 (Y) @(45, 152) /w:[ -1 2 4 1 ]
  bufif1 g3 (.Z(X), .I(w10), .E(w12));   //: @(-5,-9) /sn:0 /w:[ 0 1 0 ]
  //: dip X (w4) @(-138,-73) /w:[ 1 ] /st:5
  bufif1 g2 (.Z(X), .I(w4), .E(w0));   //: @(-55,36) /sn:0 /w:[ 3 0 9 ]
  add4 g1 (.y(Y), .x(X), .s(S));   //: @(70, 64) /sz:(66, 53) /sn:0 /p:[ Li0>3 Li1>5 Ro0<5 ]
  //: joint g10 (w0) @(115, -85) /w:[ 4 3 6 -1 ]
  //: dip Z (w10) @(-32,-73) /w:[ 0 ] /st:3
  bufif1 g6 (.Z(Y), .I(w9), .E(w0));   //: @(-42,152) /sn:0 /w:[ 5 1 0 ]
  not g9 (.I(w0), .Z(w12));   //: @(152,-85) /sn:0 /w:[ 5 9 ]
  bufif1 g7 (.Z(Y), .I(R), .E(w12));   //: @(-43,205) /sn:0 /w:[ 0 0 7 ]
  //: joint g15 (w12) @(183, -85) /w:[ -1 2 8 1 ]
  reg g17 (.ck(w12), .D(S), .Q(R));   //: @(85, 196) /sz:(40, 114) /sn:0 /p:[ Ti0>5 Ri0>0 Lo0<1 ]
  //: joint g14 (w0) @(-90, -119) /w:[ 2 -1 1 8 ]
  //: switch Step_1 (w0) @(68,-85) /w:[ 7 ] /st:0
  led g0 (.I(S));   //: @(228,14) /sn:0 /w:[ 3 ] /type:1
  //: joint g18 (w12) @(-41, 178) /w:[ 4 -1 3 6 ]
  //: dip Y (w9) @(-117,104) /w:[ 0 ] /st:4

endmodule

module reg(D, ck, Q);
//: interface  /sz:(40, 114) /bd:[ Ti0>ck(19/40) Ri0>D[3:0](17/40) Lo0<Q[3:0](19/40) ]
output [3:0] Q;    //: /sn:0 /dp:1 {0}(582,217)(618,217){1}
input [3:0] D;    //: /sn:0 {0}(131,302)(194,302){1}
input ck;    //: /sn:0 {0}(129,171)(251,171){1}
//: {2}(255,171)(322,171){3}
//: {4}(326,171)(395,171){5}
//: {6}(399,171)(465,171)(465,148){7}
//: {8}(397,169)(397,152){9}
//: {10}(324,169)(324,152){11}
//: {12}(253,169)(253,152){13}
wire w6;    //: /sn:0 {0}(282,141)(269,141){1}
wire w7;    //: /sn:0 {0}(340,141)(350,141){1}
wire w19;    //: /sn:0 {0}(481,137)(491,137){1}
wire w3;    //: /sn:0 {0}(258,120)(258,58){1}
//: {2}(260,56)(327,56){3}
//: {4}(331,56)(400,56){5}
//: {6}(404,56)(470,56)(470,116){7}
//: {8}(402,58)(402,120){9}
//: {10}(329,58)(329,120){11}
//: {12}(256,56)(218,56){13}
wire w24;    //: /sn:0 {0}(576,202)(503,202)(503,127)(481,127){1}
wire w23;    //: /sn:0 {0}(576,212)(431,212)(431,131)(413,131){1}
wire w1;    //: /sn:0 {0}(200,307)(298,307)(298,136)(308,136){1}
wire w18;    //: /sn:0 {0}(200,287)(439,287)(439,132)(449,132){1}
wire w17;    //: /sn:0 {0}(200,297)(371,297)(371,136)(381,136){1}
wire w11;    //: /sn:0 /dp:1 {0}(576,222)(359,222)(359,131)(340,131){1}
wire w13;    //: /sn:0 {0}(413,141)(423,141){1}
wire w5;    //: /sn:0 /dp:1 {0}(576,232)(291,232)(291,131)(269,131){1}
wire w29;    //: /sn:0 {0}(200,317)(227,317)(227,136)(237,136){1}
wire w9;    //: /sn:0 {0}(460,116)(460,92)(394,92){1}
//: {2}(390,92)(321,92){3}
//: {4}(317,92)(250,92){5}
//: {6}(246,92)(219,92){7}
//: {8}(248,94)(248,120){9}
//: {10}(319,94)(319,120){11}
//: {12}(392,94)(392,120){13}
//: enddecls

  //: joint g8 (w3) @(329, 56) /w:[ 4 -1 3 10 ]
  //: input g4 (D) @(129,302) /sn:0 /w:[ 0 ]
  //: joint g13 (w9) @(392, 92) /w:[ 1 -1 2 12 ]
  ff g3 (.Q(w24), ._Q(w19), .D(w18), .EN(w3), .CLR(w9), .CK(ck));   //: @(465,132) /sn:0 /w:[ 1 0 1 7 0 7 ]
  ff g2 (.Q(w23), ._Q(w13), .D(w17), .EN(w3), .CLR(w9), .CK(ck));   //: @(397,136) /sn:0 /w:[ 1 0 1 9 13 9 ]
  ff g1 (.Q(w11), ._Q(w7), .D(w1), .EN(w3), .CLR(w9), .CK(ck));   //: @(324,136) /sn:0 /w:[ 1 0 1 11 11 11 ]
  //: switch g16 (w9) @(202,92) /sn:0 /w:[ 7 ] /st:1
  concat g11 (.I0(w29), .I1(w1), .I2(w17), .I3(w18), .Z(D));   //: @(195,302) /sn:0 /R:2 /w:[ 0 0 0 0 1 ] /dr:1
  concat g10 (.I0(w5), .I1(w11), .I2(w23), .I3(w24), .Z(Q));   //: @(581,217) /sn:0 /w:[ 0 0 0 0 0 ] /dr:0
  //: joint g19 (ck) @(397, 171) /w:[ 6 8 5 -1 ]
  //: input g6 (ck) @(127,171) /sn:0 /w:[ 0 ]
  //: joint g9 (w3) @(258, 56) /w:[ 2 -1 12 1 ]
  //: joint g7 (w3) @(402, 56) /w:[ 6 -1 5 8 ]
  //: joint g15 (w9) @(248, 92) /w:[ 5 -1 6 8 ]
  //: joint g17 (ck) @(253, 171) /w:[ 2 12 1 -1 ]
  //: joint g14 (w9) @(319, 92) /w:[ 3 -1 4 10 ]
  //: output g5 (Q) @(615,217) /sn:0 /w:[ 1 ]
  ff g0 (.Q(w5), ._Q(w6), .D(w29), .EN(w3), .CLR(w9), .CK(ck));   //: @(253,136) /sn:0 /w:[ 1 1 1 0 9 13 ]
  //: joint g18 (ck) @(324, 171) /w:[ 4 10 3 -1 ]
  //: switch g12 (w3) @(201,56) /sn:0 /w:[ 13 ] /st:0

endmodule

module fa(s, c0, c, y, x);
//: interface  /sz:(40, 40) /bd:[ Li0>x(7/40) Li1>y(18/40) Li2>c(30/40) Ro0<c0(10/40) Ro1<s(29/40) ]
output c0;    //: /sn:0 {0}(364,273)(315,273){1}
input y;    //: /sn:0 {0}(105,254)(162,254){1}
//: {2}(166,254)(182,254){3}
//: {4}(164,252)(164,222)(180,222){5}
input x;    //: /sn:0 {0}(107,217)(156,217){1}
//: {2}(160,217)(180,217){3}
//: {4}(158,219)(158,249)(182,249){5}
output s;    //: /sn:0 {0}(355,218)(268,218){1}
input c;    //: /sn:0 {0}(217,200)(235,200)(235,215)(239,215){1}
//: {2}(243,215)(247,215){3}
//: {4}(241,217)(241,247)(254,247){5}
wire w12;    //: /sn:0 /dp:1 {0}(294,270)(284,270)(284,250)(275,250){1}
wire w13;    //: /sn:0 /dp:1 {0}(294,275)(213,275)(213,252)(203,252){1}
wire w5;    //: /sn:0 {0}(201,220)(224,220){1}
//: {2}(228,220)(247,220){3}
//: {4}(226,222)(226,252)(254,252){5}
//: enddecls

  and g8 (.I0(c), .I1(w5), .Z(w12));   //: @(265,250) /sn:0 /w:[ 5 5 1 ]
  //: output g4 (s) @(352,218) /sn:0 /w:[ 0 ]
  //: joint g13 (w5) @(226, 220) /w:[ 2 -1 1 4 ]
  //: output g3 (c0) @(361,273) /sn:0 /w:[ 0 ]
  //: input g2 (c) @(215,200) /sn:0 /w:[ 0 ]
  //: input g1 (y) @(103,254) /sn:0 /w:[ 0 ]
  //: joint g11 (y) @(164, 254) /w:[ 2 4 1 -1 ]
  //: joint g10 (x) @(158, 217) /w:[ 2 -1 1 4 ]
  xor g6 (.I0(x), .I1(y), .Z(w5));   //: @(191,220) /sn:0 /w:[ 3 5 0 ]
  or g9 (.I0(w12), .I1(w13), .Z(c0));   //: @(305,273) /sn:0 /w:[ 0 0 1 ]
  and g7 (.I0(x), .I1(y), .Z(w13));   //: @(193,252) /sn:0 /w:[ 5 3 1 ]
  xor g5 (.I0(c), .I1(w5), .Z(s));   //: @(258,218) /sn:0 /w:[ 3 3 1 ]
  //: input g0 (x) @(105,217) /sn:0 /w:[ 0 ]
  //: joint g12 (c) @(241, 215) /w:[ 2 -1 1 4 ]

endmodule

module add4(s, y, x);
//: interface  /sz:(40, 40) /bd:[ ]
supply0 w1;    //: /sn:0 {0}(266,296)(266,272)(279,272){1}
input [3:0] y;    //: /sn:0 {0}(114,279)(148,279){1}
input [3:0] x;    //: /sn:0 {0}(139,113)(103,113){1}
output [3:0] s;    //: /sn:0 {0}(462,192)(409,192){1}
wire w14;    //: /sn:0 {0}(154,294)(243,294)(243,260)(279,260){1}
wire w19;    //: /sn:0 {0}(154,284)(236,284)(236,211)(279,211){1}
wire w15;    //: /sn:0 {0}(279,249)(176,249)(176,128)(145,128){1}
wire w0;    //: /sn:0 {0}(279,200)(186,200)(186,118)(145,118){1}
wire w3;    //: /sn:0 {0}(328,101)(318,101){1}
wire w21;    //: /sn:0 {0}(403,197)(358,197)(358,222)(321,222){1}
wire w24;    //: /sn:0 {0}(403,177)(378,177)(378,120)(318,120){1}
wire w23;    //: /sn:0 {0}(403,187)(358,187)(358,173)(319,173){1}
wire w20;    //: /sn:0 {0}(403,207)(381,207)(381,271)(321,271){1}
wire w25;    //: /sn:0 {0}(154,264)(218,264)(218,109)(276,109){1}
wire w18;    //: /sn:0 {0}(321,252)(331,252)(331,237)(269,237)(269,223)(279,223){1}
wire w8;    //: /sn:0 {0}(319,154)(329,154)(329,139)(266,139)(266,121)(276,121){1}
wire w22;    //: /sn:0 {0}(154,274)(226,274)(226,162)(277,162){1}
wire w12;    //: /sn:0 {0}(145,98)(276,98){1}
wire w13;    //: /sn:0 {0}(321,203)(331,203)(331,188)(267,188)(267,174)(277,174){1}
wire w9;    //: /sn:0 {0}(145,108)(192,108)(192,151)(277,151){1}
//: enddecls

  concat g8 (.I0(w15), .I1(w0), .I2(w9), .I3(w12), .Z(x));   //: @(140,113) /sn:0 /R:2 /w:[ 1 1 0 0 0 ] /dr:1
  fa g4 (.c(w13), .y(w22), .x(w9), .s(w23), .c0(w8));   //: @(278, 144) /sz:(40, 40) /sn:0 /p:[ Li0>1 Li1>1 Li2>1 Ro0<1 Ro1<0 ]
  fa g3 (.c(w8), .y(w25), .x(w12), .s(w24), .c0(w3));   //: @(277, 91) /sz:(40, 40) /sn:0 /p:[ Li0>1 Li1>1 Li2>1 Ro0<1 Ro1<1 ]
  //: output g2 (s) @(459,192) /sn:0 /w:[ 0 ]
  //: input g1 (y) @(112,279) /sn:0 /w:[ 0 ]
  //: supply0 g10 (w1) @(266,302) /sn:0 /w:[ 0 ]
  fa g6 (.c(w1), .y(w14), .x(w15), .s(w20), .c0(w18));   //: @(280, 242) /sz:(40, 40) /sn:0 /p:[ Li0>1 Li1>1 Li2>0 Ro0<1 Ro1<0 ]
  concat g9 (.I0(w14), .I1(w19), .I2(w22), .I3(w25), .Z(y));   //: @(149,279) /sn:0 /R:2 /w:[ 0 0 0 0 1 ] /dr:1
  concat g7 (.I0(w20), .I1(w21), .I2(w23), .I3(w24), .Z(s));   //: @(408,192) /sn:0 /w:[ 0 0 0 0 1 ] /dr:0
  fa g5 (.c(w18), .y(w19), .x(w0), .s(w21), .c0(w13));   //: @(280, 193) /sz:(40, 40) /sn:0 /p:[ Li0>1 Li1>1 Li2>0 Ro0<1 Ro1<0 ]
  //: input g0 (x) @(101,113) /sn:0 /w:[ 1 ]

endmodule