Intro to Architecture

Fall 2003, Test 2


  1. (5 pts) Draw a non-trivial timing diagram that demonstrates the performance of a D-FlipFlop. Please draw dashed vertical lines at the leading edge of a clock tick through all I/O timing lines.

  2. (3 pts) Describe the operation of a dynamic memory cell.

  3. (4 pts) Define memory gap.

  4. (5 pts) Describe the width and function of all I/O lines to a 2nx w memory system.

  5. (5 pts) Give all steps necessary to store a value at an address in a 2nx w memory subsystem.

  6. (5 pts) Describe how two 2nxw memory subsystems can be combined to form a 2nx2w memory sub system. Draw a picture, label all I/O lines with a width and a name.

  7. (3 pts) Define word as it relates to computer architecture.

  8. (5 pts) The simple computer described in chapter 3 performs two memory accesses per instruction. Discuss how this impacts performance.

  9. (5 pts) What are MIPS? If a machine uses x cycles per instruction and has a clock operating at y MHz, set up the computation to find the MIPS of the machine.

  10. (10 pts) You are purchasing a new computer. Salesman Bob recommends a computer with an Itanium 2, running a 1.5 GHz. Salesman Steve, says that a computer with a 3.2 GHz Xeon is faster and you should get it. Is there sufficient information to determine which computer you should purchase? Why or why not. Give at least two additional factors (derived from information discussed in this class) that you should obtain information on when making your decision.