//: version "2.0-b10"
//: property encoding = "iso8859-1"
//: property locale = "en"
//: property prefix = "_GG"
//: property timingViolationMode = 2
//: property initTime = "0 ns"

`timescale 1ns/1ns

//: /netlistBegin main
module main;    //: root_module
reg [1:0] w6;    //: /sn:0 {0}(#:509,250)(509,202){1}
reg [1:0] w7;    //: /sn:0 {0}(#:517,441)(517,401){1}
supply0 w3;    //: /sn:0 {0}(392,418)(392,383){1}
//: {2}(392,379)(392,308){3}
//: {4}(392,304)(392,229){5}
//: {6}(392,225)(392,144)(370,144){7}
//: {8}(390,227)(370,227){9}
//: {10}(390,306)(370,306){11}
//: {12}(390,381)(370,381){13}
reg w20;    //: /sn:0 {0}(373,509)(413,509)(413,373){1}
//: {2}(413,369)(413,298){3}
//: {4}(413,294)(413,219){5}
//: {6}(413,215)(413,134)(370,134){7}
//: {8}(411,217)(370,217){9}
//: {10}(411,296)(370,296){11}
//: {12}(411,371)(370,371){13}
reg [1:0] w1;    //: /sn:0 {0}(#:85,74)(145,74)(145,168){1}
supply1 w18;    //: /sn:0 {0}(121,181)(100,181)(100,208){1}
reg [7:0] w2;    //: /sn:0 {0}(#:331,366)(331,344)(262,344)(262,277){1}
//: {2}(#:264,275)(331,275)(331,291){3}
//: {4}(262,273)(262,199){5}
//: {6}(#:264,197)(331,197)(331,212){7}
//: {8}(262,195)(262,119){9}
//: {10}(#:264,117)(331,117)(331,129){11}
//: {12}(262,115)(#:262,47){13}
reg w33;    //: /sn:0 {0}(157,409)(193,409)(193,380){1}
//: {2}(195,378)(215,378){3}
//: {4}(193,376)(193,305){5}
//: {6}(195,303)(215,303){7}
//: {8}(193,301)(193,226){9}
//: {10}(195,224)(215,224){11}
//: {12}(193,222)(193,141)(215,141){13}
wire w16;    //: /sn:0 {0}(215,136)(181,136)(181,212)(163,212)(163,197){1}
wire w14;    //: /sn:0 {0}(294,301)(236,301){1}
wire w19;    //: /sn:0 {0}(294,376)(236,376){1}
wire [7:0] w15;    //: /sn:0 {0}(#:493,197)(454,197)(454,394){1}
//: {4}(#:452,396)(331,396)(#:331,387){5}
//: {2}(454,398)(454,396)(501,396){3}
wire w4;    //: /sn:0 {0}(294,139)(236,139){1}
wire [7:0] w0;    //: /sn:0 {0}(#:331,150)(331,161)(424,161){1}
//: {2}(428,161)(493,161){3}
//: {4}(#:426,163)(426,360)(501,360){5}
wire [7:0] w21;    //: /sn:0 {0}(#:530,378)(667,378)(667,131){1}
wire w8;    //: /sn:0 {0}(215,373)(127,373)(127,197){1}
wire [7:0] w17;    //: /sn:0 {0}(#:522,179)(586,179)(586,129){1}
wire w12;    //: /sn:0 {0}(215,219)(151,219)(151,197){1}
wire w11;    //: /sn:0 {0}(215,298)(139,298)(139,197){1}
wire [7:0] w10;    //: /sn:0 {0}(#:493,185)(442,185)(442,319){1}
//: {2}(#:440,321)(331,321)(#:331,312){3}
//: {4}(442,323)(442,384)(501,384){5}
wire [7:0] w5;    //: /sn:0 {0}(#:331,233)(331,243)(431,243){1}
//: {2}(433,241)(433,173)(493,173){3}
//: {4}(433,245)(433,372)(501,372){5}
wire w9;    //: /sn:0 {0}(294,222)(236,222){1}
//: enddecls

  //: VDD g4 (w18) @(89,208) /sn:0 /R:2 /w:[ 1 ]
  //: GROUND g8 (w3) @(392,424) /sn:0 /w:[ 0 ]
  _GGMUX4x8 #(12, 12) g13 (.I0(w0), .I1(w5), .I2(w10), .I3(w15), .S(w7), .Z(w21));   //: @(517,378) /sn:0 /R:1 /w:[ 5 5 5 3 1 0 ] /ss:0 /do:1
  _GGREG8 #(10, 10, 20) g3 (.Q(w15), .D(w2), .EN(w3), .CLR(~w20), .CK(w19));   //: @(331,376) /sn:0 /w:[ 5 0 13 13 0 ]
  _GGREG8 #(10, 10, 20) g2 (.Q(w10), .D(w2), .EN(w3), .CLR(~w20), .CK(w14));   //: @(331,301) /sn:0 /w:[ 3 3 11 11 0 ]
  _GGREG8 #(10, 10, 20) g1 (.Q(w5), .D(w2), .EN(w3), .CLR(~w20), .CK(w9));   //: @(331,222) /sn:0 /w:[ 0 7 9 9 0 ]
  //: joint g16 (w5) @(433, 243) /w:[ -1 2 1 4 ]
  //: joint g11 (w3) @(392, 381) /w:[ -1 2 12 1 ]
  //: joint g28 (w33) @(193, 303) /w:[ 6 8 -1 5 ]
  //: joint g10 (w3) @(392, 306) /w:[ -1 4 10 3 ]
  _GGAND2 #(6) g27 (.I0(w8), .I1(w33), .Z(w19));   //: @(226,376) /sn:0 /w:[ 0 3 1 ]
  //: joint g19 (w2) @(262, 275) /w:[ 2 4 -1 1 ]
  //: DIP ReadReg2 (w7) @(517,452) /R:2 /w:[ 0 ] /st:0 /dn:1
  //: LED ReadData1 (w17) @(586,122) /w:[ 1 ] /type:3
  //: joint g6 (w20) @(413, 296) /w:[ -1 4 10 3 ]
  //: joint g9 (w3) @(392, 227) /w:[ -1 6 8 5 ]
  //: joint g7 (w20) @(413, 371) /w:[ -1 2 12 1 ]
  //: joint g20 (w2) @(262, 197) /w:[ 6 8 -1 5 ]
  //: joint g15 (w10) @(442, 321) /w:[ -1 1 2 4 ]
  //: joint g29 (w33) @(193, 378) /w:[ 2 4 -1 1 ]
  _GGAND2 #(6) g25 (.I0(w12), .I1(w33), .Z(w9));   //: @(226,222) /sn:0 /w:[ 0 11 1 ]
  //: joint g17 (w0) @(426, 161) /w:[ 2 -1 1 4 ]
  //: SWITCH Enable (w20) @(356,509) /w:[ 0 ] /st:0 /dn:1
  //: joint g14 (w15) @(454, 396) /w:[ -1 1 4 2 ]
  //: joint g5 (w20) @(413, 217) /w:[ -1 6 8 5 ]
  _GGAND2 #(6) g24 (.I0(w16), .I1(w33), .Z(w4));   //: @(226,139) /sn:0 /w:[ 0 13 1 ]
  //: joint g21 (w2) @(262, 117) /w:[ 10 12 -1 9 ]
  //: DIP ReadReg1 (w6) @(509,261) /R:2 /w:[ 0 ] /st:0 /dn:1
  //: DIP WriteData (w2) @(262,37) /w:[ 13 ] /st:3 /dn:1
  //: joint g22 (w33) @(193, 224) /w:[ 10 12 -1 9 ]
  _GGAND2 #(6) g26 (.I0(w11), .I1(w33), .Z(w14));   //: @(226,301) /sn:0 /w:[ 0 7 1 ]
  _GGREG8 #(10, 10, 20) g0 (.Q(w0), .D(w2), .EN(w3), .CLR(~w20), .CK(w4));   //: @(331,139) /sn:0 /w:[ 0 11 7 7 0 ]
  //: LED ReadData2 (w21) @(667,124) /w:[ 1 ] /type:3
  //: DIP WriteRegister (w1) @(47,74) /R:1 /w:[ 0 ] /st:3 /dn:1
  //: SWITCH RegWrite (w33) @(140,409) /w:[ 0 ] /st:0 /dn:1
  _GGDECODER4 #(6, 6) g18 (.I(w1), .E(w18), .Z0(w16), .Z1(w12), .Z2(w11), .Z3(w8));   //: @(145,181) /sn:0 /w:[ 1 0 1 1 1 1 ] /ss:0 /do:1
  _GGMUX4x8 #(12, 12) g12 (.I0(w0), .I1(w5), .I2(w10), .I3(w15), .S(w6), .Z(w17));   //: @(509,179) /sn:0 /R:1 /w:[ 3 3 0 0 1 0 ] /ss:0 /do:1

endmodule
//: /netlistEnd