//: version "2.0-b10" //: property encoding = "iso8859-1" //: property locale = "en" //: property prefix = "_GG" //: property timingViolationMode = 2 //: property initTime = "0 ns" `timescale 1ns/1ns //: /netlistBegin main module main; //: root_module reg w6; //: /sn:0 {0}(397,356)(443,356)(443,289){1} //: {2}(443,285)(443,208){3} //: {4}(443,204)(443,135){5} //: {6}(443,131)(443,37)(409,37){7} //: {8}(441,133)(397,133){9} //: {10}(441,206)(397,206){11} //: {12}(441,287)(397,287){13} reg [1:0] w21; //: /sn:0 {0}(#:477,399)(537,399)(537,289){1} reg [7:0] w24; //: /sn:0 {0}(#:358,118)(358,105)(290,105){1} //: {2}(286,105)(#:181,105)(#:181,90){3} //: {4}(288,107)(288,175){5} //: {6}(#:290,177)(358,177)(358,191){7} //: {8}(288,179)(288,255){9} //: {10}(#:290,257)(358,257)(358,272){11} //: {12}(288,259)(#:288,329)(358,329)(358,341){13} supply1 w1; //: /sn:0 {0}(193,327)(193,300){1} reg [1:0] w2; //: /sn:0 {0}(#:128,277)(159,277)(159,278)(180,278){1} reg w11; //: /sn:0 {0}(397,346)(425,346)(425,279){1} //: {2}(425,275)(425,198){3} //: {4}(425,194)(425,125){5} //: {6}(425,121)(425,84)(412,84){7} //: {8}(423,123)(397,123){9} //: {10}(423,196)(397,196){11} //: {12}(423,277)(397,277){13} reg w27; //: /sn:0 {0}(261,348)(231,348)(231,281){1} //: {2}(233,279)(261,279){3} //: {4}(231,277)(231,200){5} //: {6}(233,198)(261,198){7} //: {8}(231,196)(231,127){9} //: {10}(233,125)(261,125){11} //: {12}(231,123)(231,36)(211,36){13} wire w7; //: /sn:0 {0}(209,296)(216,296)(216,353)(261,353){1} wire w16; //: /sn:0 {0}(321,282)(282,282){1} wire w14; //: /sn:0 {0}(209,284)(236,284)(236,284)(261,284){1} wire w19; //: /sn:0 {0}(321,351)(282,351){1} wire [7:0] w15; //: /sn:0 {0}(521,284)(495,284)(495,372)(358,372)(#:358,362){1} wire w4; //: /sn:0 {0}(209,260)(213,260)(213,130)(261,130){1} wire [7:0] w0; //: /sn:0 {0}(521,248)(468,248)(468,168)(358,168)(#:358,139){1} wire [7:0] w20; //: /sn:0 {0}(#:550,266)(570,266)(570,181){1} wire w22; //: /sn:0 {0}(321,201)(282,201){1} wire [7:0] w10; //: /sn:0 {0}(521,272)(479,272)(479,315)(358,315)(#:358,293){1} wire [7:0] w5; //: /sn:0 {0}(521,260)(408,260)(408,234)(358,234)(#:358,212){1} wire w9; //: /sn:0 {0}(209,272)(218,272)(218,203)(261,203){1} wire w26; //: /sn:0 {0}(321,128)(282,128){1} //: enddecls //: DIP Data (w24) @(181,80) /w:[ 3 ] /st:0 /dn:1 _GGREG8 #(10, 10, 20) g3 (.Q(w15), .D(w24), .EN(w6), .CLR(w11), .CK(w19)); //: @(358,351) /sn:0 /w:[ 1 13 0 0 0 ] _GGREG8 #(10, 10, 20) g2 (.Q(w10), .D(w24), .EN(w6), .CLR(w11), .CK(w16)); //: @(358,282) /sn:0 /w:[ 1 11 13 13 0 ] //: SWITCH Clock (w27) @(194,36) /w:[ 13 ] /st:0 /dn:1 //: SWITCH Clear_Not (w11) @(395,84) /w:[ 7 ] /st:0 /dn:1 _GGREG8 #(10, 10, 20) g1 (.Q(w5), .D(w24), .EN(w6), .CLR(w11), .CK(w22)); //: @(358,201) /sn:0 /w:[ 1 7 11 11 0 ] //: joint g16 (w11) @(425, 196) /w:[ -1 4 10 3 ] //: joint g11 (w24) @(288, 177) /w:[ 6 5 -1 8 ] //: joint g28 (w27) @(231, 198) /w:[ 6 8 -1 5 ] //: joint g10 (w24) @(288, 257) /w:[ 10 9 -1 12 ] //: joint g27 (w27) @(231, 279) /w:[ 2 4 -1 1 ] //: joint g19 (w6) @(443, 206) /w:[ -1 4 10 3 ] //: joint g9 (w24) @(288, 105) /w:[ 1 -1 2 4 ] _GGDECODER4 #(6, 6) g7 (.I(w2), .E(w1), .Z0(w7), .Z1(w14), .Z2(w9), .Z3(w4)); //: @(193,278) /sn:0 /R:1 /w:[ 1 1 0 0 0 0 ] /ss:0 /do:0 //: joint g20 (w6) @(443, 133) /w:[ -1 6 8 5 ] //: joint g15 (w11) @(425, 277) /w:[ -1 2 12 1 ] //: DIP Read_Register (w21) @(439,399) /R:1 /w:[ 0 ] /st:0 /dn:1 //: LED Output0 (w20) @(570,174) /w:[ 1 ] /type:3 //: joint g29 (w27) @(231, 125) /w:[ 10 12 -1 9 ] _GGAND2 #(6) g25 (.I0(w27), .I1(w4), .Z(w26)); //: @(272,128) /sn:0 /w:[ 11 1 1 ] //: joint g17 (w11) @(425, 123) /w:[ -1 6 8 5 ] //: SWITCH Enable_Not (w6) @(392,37) /w:[ 7 ] /st:0 /dn:1 _GGMUX4x8 #(12, 12) g5 (.I0(w15), .I1(w10), .I2(w5), .I3(w0), .S(w21), .Z(w20)); //: @(537,266) /sn:0 /R:1 /w:[ 0 0 0 0 1 0 ] /ss:0 /do:0 _GGAND2 #(6) g24 (.I0(w27), .I1(w9), .Z(w22)); //: @(272,201) /sn:0 /w:[ 7 1 1 ] _GGAND2 #(6) g23 (.I0(w27), .I1(w14), .Z(w16)); //: @(272,282) /sn:0 /w:[ 3 1 1 ] _GGAND2 #(6) g22 (.I0(w27), .I1(w7), .Z(w19)); //: @(272,351) /sn:0 /w:[ 0 1 1 ] _GGREG8 #(10, 10, 20) g0 (.Q(w0), .D(w24), .EN(w6), .CLR(w11), .CK(w26)); //: @(358,128) /sn:0 /w:[ 1 0 9 9 0 ] //: DIP Write_Register (w2) @(90,277) /R:1 /w:[ 0 ] /st:0 /dn:1 //: joint g18 (w6) @(443, 287) /w:[ -1 2 12 1 ] //: VDD g12 (w1) @(182,327) /sn:0 /R:2 /w:[ 0 ] endmodule //: /netlistEnd