Control Hazards

• Make sure for data hazards
  • What are they?
  • How are they eliminated?
  • Can they all be eliminated?
  • What is the load delay slot?
• What is a control hazard?
  • Definition
  • Example
• Mitigation of control hazards
  • The branch delay slot
  • Branch prediction.
    • Assume branch not taken.
      • Static branch prediction.
      • The default.
      • Probably ok for loops
      • Probably not good for if.

      •            move $t1, $zero
        Loop_Top:
                   beq	$t1, size, Loop_Done
        	   lw	$t2, phrase($t1)
        	   addi	$t2, $t2, 32
        	   sw	$t2, phrase($t4)
        	   addi	$t1, $t1, 1
        	   b	Loop_Top
        		

      • Can we fill the BDS?
      • How many times will predict not-taken fail?
      • How about with loops in general?
    • Dynamic branch prediction.
      • We can build a table of branch instruction address and branch targets
        • When we encounter a new branch, we save the instruction address and the target address.
        • When we encounter that address again, we know the target address.
        • Where can this be done?
        • Where would we like this to be done?
      • We could add another bit to the table to show what we did last time.
        • This is called one bit branch prediction.
        • Initially store a 1 if the branch was taken and a 0 if not.
        • Use the last branch prediction for the next branch prediction.
      • Consider

        for (i=0; i < 100; i++) {
           if (i%2 == 0) {
               cout << "even" << endl;
           } else {
               cout << "odd" << endl;
           }
        }
        		 

      • How would this do normally?
      • How would this do with 1 bit branch prediction?
      • Two bit prediction.