//: version "2.0-b10" //: property encoding = "iso8859-1" //: property locale = "en" //: property prefix = "_GG" //: property title = "MIPS_ALU.v" //: property timingViolationMode = 2 //: property initTime = "0 ns" `timescale 1ns/1ns //: /netlistBegin main module main; //: root_module reg w7; //: /sn:0 {0}(137,67)(153,67)(153,99){1} reg [1:0] w14; //: /sn:0 {0}(315,281)(#:315,235){1} reg [3:0] w0; //: /sn:0 {0}(#:168,580)(149,580)(#:149,514){1} reg w8; //: /sn:0 {0}(121,108)(101,108)(101,98)(84,98){1} reg [3:0] w18; //: /sn:0 {0}(#:169,778)(158,778)(#:158,715){1} reg [1:0] w17; //: /sn:0 {0}(#:388,770)(388,760)(416,760)(416,673){1} //: {2}(416,669)(416,588){3} //: {4}(416,584)(416,498){5} //: {6}(416,494)(#:416,485){7} //: {8}(414,496)(373,496)(#:373,506){9} //: {10}(414,586)(379,586)(#:379,594){11} //: {12}(414,671)(381,671)(#:381,681){13} reg w11; //: /sn:0 {0}(208,299)(193,299)(193,287)(165,287){1} reg w12; //: /sn:0 {0}(208,327)(193,327)(193,337)(161,337){1} reg w13; //: /sn:0 {0}(263,281)(263,260)(232,260){1} reg w5; //: /sn:0 {0}(321,506)(321,493)(250,493){1} reg w9; //: /sn:0 {0}(121,138)(100,138)(100,149)(85,149){1} wire w6; //: /sn:0 {0}(266,524)(201,524)(201,565)(174,565){1} wire w32; //: /sn:0 {0}(281,816)(188,816)(188,793)(175,793){1} wire w16; //: /sn:0 {0}(437,530)(437,542)(403,542){1} wire w4; //: /sn:0 {0}(265,91)(265,122)(193,122){1} wire w15; //: /sn:0 {0}(344,576)(344,588)(327,588)(327,594){1} wire w19; //: /sn:0 {0}(272,612)(262,612)(262,597)(307,597)(307,575)(174,575){1} wire w3; //: /sn:0 {0}(298,91)(298,177)(157,177)(157,162){1} wire w34; //: /sn:0 {0}(441,797)(441,806)(418,806){1} wire w21; //: /sn:0 {0}(350,664)(350,676)(329,676)(329,681){1} wire w31; //: /sn:0 {0}(281,788)(237,788)(237,595)(174,595){1} wire w28; //: /sn:0 {0}(444,696)(444,717)(411,717){1} wire w20; //: /sn:0 {0}(272,640)(220,640)(220,773)(175,773){1} wire w1; //: /sn:0 {0}(418,301)(418,366)(286,366)(286,351){1} wire w25; //: /sn:0 {0}(274,699)(245,699)(245,585)(174,585){1} wire w22; //: /sn:0 {0}(439,619)(439,630)(409,630){1} wire w2; //: /sn:0 {0}(387,300)(387,317)(345,317){1} wire w10; //: /sn:0 {0}(266,552)(211,552)(211,763)(175,763){1} wire w27; //: /sn:0 {0}(352,751)(352,759)(336,759)(336,770){1} wire w33; //: /sn:0 {0}(443,836)(443,851)(359,851)(359,840){1} wire w26; //: /sn:0 {0}(274,727)(227,727)(227,783)(175,783){1} //: enddecls //: SWITCH g4 (w8) @(67,98) /sn:0 /w:[ 1 ] /st:0 /dn:1 //: SWITCH g8 (w12) @(144,337) /sn:0 /w:[ 1 ] /st:0 /dn:1 //: DIP B (w18) @(158,705) /w:[ 1 ] /st:10 /dn:0 //: SWITCH g3 (w7) @(120,67) /sn:0 /w:[ 0 ] /st:0 /dn:1 ALUA g13 (.Operation(w17), .Cin(w5), .b(w10), .a(w6), .Cout(w15), .Result(w16)); //: @(267, 507) /sz:(135, 68) /sn:0 /p:[ Ti0>9 Ti1>0 Li0>0 Li1>0 Bo0<0 Ro0<1 ] //: LED g2 (w4) @(265,84) /sn:0 /w:[ 0 ] /type:0 //: LED g1 (w3) @(298,84) /sn:0 /w:[ 0 ] /type:0 //: DIP A (w0) @(149,504) /w:[ 1 ] /st:1 /dn:0 //: LED g11 (w1) @(418,294) /sn:0 /w:[ 0 ] /type:0 ALUA g16 (.Operation(w17), .Cin(w27), .b(w32), .a(w31), .Cout(w33), .Result(w34)); //: @(282, 771) /sz:(135, 68) /sn:0 /p:[ Ti0>0 Ti1>1 Li0>0 Li1>0 Bo0<1 Ro0<1 ] //: DIP g10 (w14) @(315,225) /sn:0 /w:[ 1 ] /st:0 /dn:1 //: LED g19 (w22) @(439,612) /sn:0 /w:[ 0 ] /type:0 ALUA g6 (.Operation(w14), .Cin(w13), .b(w12), .a(w11), .Cout(w1), .Result(w2)); //: @(209, 282) /sz:(135, 68) /sn:0 /p:[ Ti0>0 Ti1>0 Li0>0 Li1>0 Bo0<1 Ro0<1 ] //: DIP Operation (w17) @(416,475) /w:[ 7 ] /st:2 /dn:0 //: SWITCH g7 (w11) @(148,287) /sn:0 /w:[ 1 ] /st:0 /dn:1 //: SWITCH g9 (w13) @(215,260) /sn:0 /w:[ 1 ] /st:0 /dn:1 ALUA g15 (.Operation(w17), .Cin(w21), .b(w26), .a(w25), .Cout(w27), .Result(w28)); //: @(275, 682) /sz:(135, 68) /sn:0 /p:[ Ti0>13 Ti1>1 Li0>0 Li1>0 Bo0<0 Ro0<1 ] //: LED g20 (w16) @(437,523) /sn:0 /w:[ 0 ] /type:0 //: SWITCH Carry_In (w5) @(233,493) /w:[ 1 ] /st:0 /dn:0 //: LED g17 (w34) @(441,790) /sn:0 /w:[ 0 ] /type:0 //: joint g25 (w17) @(416, 671) /w:[ -1 2 12 1 ] assign {w32, w26, w20, w10} = w18; //: CONCAT g29 @(170,778) /sn:0 /R:2 /w:[ 1 1 1 1 0 ] /dr:0 /tp:0 /drp:0 //: SWITCH g5 (w9) @(68,149) /sn:0 /w:[ 1 ] /st:0 /dn:1 ALUA g14 (.Operation(w17), .Cin(w15), .b(w20), .a(w19), .Cout(w21), .Result(w22)); //: @(273, 595) /sz:(135, 68) /sn:0 /p:[ Ti0>11 Ti1>1 Li0>0 Li1>0 Bo0<0 Ro0<1 ] //: LED g21 (w33) @(443,829) /sn:0 /w:[ 0 ] /type:0 //: joint g24 (w17) @(416, 586) /w:[ -1 4 10 3 ] //: joint g23 (w17) @(416, 496) /w:[ -1 6 8 5 ] FA g0 (.Cin(w7), .a(w8), .b(w9), .Cout(w3), .Sum(w4)); //: @(122, 100) /sz:(70, 61) /sn:0 /p:[ Ti0>1 Li0>0 Li1>0 Bo0<1 Ro0<1 ] //: LED g12 (w2) @(387,293) /sn:0 /w:[ 0 ] /type:0 //: LED g18 (w28) @(444,689) /sn:0 /w:[ 0 ] /type:0 assign {w31, w25, w19, w6} = w0; //: CONCAT g30 @(169,580) /sn:0 /R:2 /w:[ 1 1 1 1 0 ] /dr:0 /tp:0 /drp:0 endmodule //: /netlistEnd //: /netlistBegin ALUA module ALUA(Result, Operation, Cin, b, Cout, a); //: interface /sz:(135, 68) /bd:[ Ti0>Operation[1:0](106/135) Ti1>Cin(54/135) Li0>b(45/68) Li1>a(17/68) Bo00 Li0>9 Li1>9 Bo0<1 Ro0<0 ] _GGAND2 #(6) g7 (.I0(a), .I1(b), .Z(w5)); //: @(294,144) /sn:0 /w:[ 0 7 1 ] //: joint g9 (a) @(184, 141) /w:[ 1 -1 2 4 ] //: OUT g5 (Cout) @(300,359) /sn:0 /w:[ 0 ] //: GROUND g14 (w0) @(371,282) /sn:0 /w:[ 0 ] //: IN g0 (a) @(120,141) /sn:0 /w:[ 3 ] //: joint g12 (b) @(204, 257) /w:[ -1 2 1 8 ] endmodule //: /netlistEnd //: /netlistBegin FA module FA(b, a, Sum, Cout, Cin); //: interface /sz:(70, 61) /bd:[ Ti0>Cin(31/70) Li0>a(8/61) Li1>b(38/61) Bo0