Flow Control

• branch address
• branch to this address
• This changes the value of the program counter to address
• labels provide us with a destination for jumps

  label: op  opcodes
         op  opcodes
         op  opcodes
         branch top
     

• Remember instruction overlap?
• This causes a problem for branches and jumps that we will see later
• For now, most RISC machines have a branch delay slot
• This is an instruction that is loaded between when the jump is read in and it is executed.
• It will be executed between the jump and the destination of the jump

  
  top:   op1 codes
         op2 codes
         branch top
         bds  codes
     

• execution

     op1, op2, branch, bds, op1 ...
     

• For ease of use, we will put a nop - non operation in the branch delay slot.
• Compilers are responsible for filling the branch delay slot with something useful.
• The only problem is if the branch is not taken, we may want to not use the instruction in the branch delay slot.
• For this purposes, some archetectures support anullment
• This means, that if we don't take the branch, we abort the instruction in the bds
• More on this later (ch 9) and much more in Arch II
• Use a * to nullify a branch instruction

• 
  top:   op1 codes
         op2 codes
         branch* top
         bds  codes
         op3 codes
     

• if the branch is not taken, the execution is op1, op2, op3

Conditional Branches

• Branch posibilities = {eq, ne, lt, gt, ge, le}
• BR?? R1,R2, target
• The target is probably limited to 32-6-10 = 18 bits, 2^18-1-1
• How about A single register branch instruction
• BR?? R1, target
• This is somewhat better 32-6-5 = 21 bits for the target.
• How about the previous instruction sets a bit. The results are checked in the branch
• BR?? target
• This gives us 32-6 = 26 bits for the target address.

Problem: Write a program that will find the sum of the first 10 odd numbers

sum = 0;
for(i=0;i<10;i+=2) {
  sum += i; 
}


        ADD R4, R0, R0         ; R4 is the sum
        ADD R3, #19, R0        ; stick 19 in Register 0
        ADD R2,#1, R0          ; R2 is the lcv
top:    SUB R0, R2, R0         ; if i > 19
        BRGT out               ; quit
	NOP                    ; fill the bds
	ADD R4, R4, R2         ;  sum += i;
	ADD R2, #2, R2         ;  i+= 2;
        BRANCH top
	nop                    
out: