Chapter 2 continued
- Combinational Circuits Continued
- Transistors
- All of our logical circuits are built from transistors
- TRANsfer reSISTOR
-
- When a positive charge is applied to the base,
electrons flow from the emitter to the collector
- When zero voltage is applied to the base, electrons can not flow.
- Electrons flow from ground to a voltage source.
-
- The above diagram represents a not gate.
- In some way, we are looking for a potential flow from the output line.
-
- This is a nor circuit
-
- This is a nand circuit
- Universal Gates
- As we saw above, we can construct simple gates from transistors.
- These can construct simple nand, nor, and not
gates.
- nand
- Not And
-
-
x | y | x nand y |
0 | 0 | 1 |
0 | 1 | 1 |
1 | 0 | 1 |
1 | 1 | 0 |
- nor
- Not Or
-
-
x | y | x nor y |
0 | 0 | 1 |
0 | 1 | 0 |
1 | 0 | 0 |
1 | 1 | 0 |
- equiv
- Not xor
-
-
x | y | x equiv y |
0 | 0 | 1 |
0 | 1 | 0 |
1 | 0 | 0 |
1 | 1 | 1 |
- These gates are called universal because all other gates can
be constructed using only nand or only nor gates.
- Generalized and and or Gates
- We can extend our basic gates to allow more inputs.
- These are called generalized gates.
- They Have the same propagation delay.
- They take up more space.
-
- Why do we want this?
- We can express the output of the full adder in Boolean algebra
-
- We can solve these equations algebraically.
- Look for a complete list of rules on page 45.
-
- Notice, the final expression (although more complex) is a
sum of products.
- This represents a two level circuit
-
- Or a tkgate circuit
-
- And this has a propagation delay of one gate less than our
outer circuit.
- Here we are trading space for speed.
- The sum of products form is known as disjunctive normal form
- Every boolean expression can be written in this form.
- Unfortunately, there is only a limited number of gates we
can send a signal to before we need to boost the signal.
- This is called the fan out problem
- Integrated Circuits
- IC for short
- An IC is a collection of gates on one chip
- DIP - dual in-line package
-
- SIP - single in-line package
- Signal leads are not shielded, and cannot cross.
- This limits the ability to get signals in-to/out-of the chip
- This is called the Pin Limitation Problem
- Levels of chip design
- SSI - small scale integration
- 1-10 gates
- Example to pass around.
- Four gates on the same chip
- MSI - medium scale integration
- 10-100 gates
- Multiplexer
- Example:
- Four inputs for data
- Two inputs for control
- One output
- Based on the values of the control line, one of
the data lines is selected for output.
-
-
-
c1 | c0 | o |
0 | 0 | i0 |
0 | 1 | i1 |
1 | 0 | i2 |
1 | 1 | i3 |
- This is a 4-1 multiplexer
- A demultiplexer takes 1 input and n signals and
supplies a value to one of 2n output lines
- LSI - large scale integration
- 100 - 10,000 gates
- Programmable Logic Arrays
- VLSI - very large scale integration
- 10,000 +, keeps going
- Microprocessors.
- Current processors have up to 250 million transistors