Finally with Interrupts

Objectives

Notes

• Most operating systems contain an interrupt vector
  • the ATMega 328 interrupt table is on page 49.
  • Looking this over we see
    • Watchdog system reset
    • External interrupts
    • Timer Interrupts
    • UART (Universal Synchronous and Asynchronous Receiver-Transmitter)
      • Data transmission protocol
  • Each of these has an associated interrupt handler
    • As we have discussed these are short routines that process the interrupt
  • Some interrupts can be masked, but some can't (nonmaskabele)https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-7810-Automotive-Microcontrollers-ATmega328P_Datasheet.pdf
  • Most modern systems
    • queue interrupts
    • provide priority to interrupts
  • This is achieved by specialized hardware such as intel's APIC advanced programmable interrupt controller
• An example use: device I/O
  • Many systems have Direct Memory Access (DMA)
    • The DMA controller can access (read/write) memory without the intervention of the CPU
  • So if a program requests input
    • It makes a read system call, via a software interrupt.
      • This jumps into protected mode in the OS and begins an I/O operation
      • It uses the device driver to
        • Communicate with the device the parameters of the I/O operation
      • Sets up the transfer location with the DMA controller
    • The os then lets another thread run
      • The program/process/thread that requested the I/O is blocked waiting for I/O
    • The device does it's job, loading data into memory
      • When this is complete, an interrupt occurs
    • The os then moves the original process to the ready queue as it is no longer blocked for I/O
  • See the picture on page 10