The 8 Bit Computer
Notes
- The material is based on Ben Eater's Build an 8-Bit computer from scratch videos
- This is a FANTASTIC set of tutorials you should be more than ready for now.
- I have implemented a javascript version of this here.
- This is a work in progress but I believe that it is usable.
- Computers run the Fetch Decode Execute (FDE) cycle/algorithm/program
- The idealized computer architecture
- A program counter(pc) contains the address of the next instruction to be executed at the beginning of the FDE cycle
- An instruction register holds the current instruction at the end of the Fetch phase of the FDE cycle
- A control unit which "interprets" the current instruction and drives the other components
- One or more General purpose registers
- An Arithmetic Logic Unit which performs computations
- A Memory Management Unit which is the interface between the CPU and Memory.
- These are all connected via an internal bus.
- With Ben's Computer
- There is a single general purpose register, A
- There are multiple special purpose registers
- PC
- MAR - Memory Address Register
- IR
- B - holds data for the second input to the ALU
- I/O Register
- A word is 8 bits (hence the name)
- There are 16 memory addresses
- RTN register transfer notation
- This is an informal notation that describes how data moves between components of the CPU
- Generally it is dest ← source
- Let's figure out the FDE cycle
- At a high level
- At a low level (microcode)