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Memory, Chapter 5.

To the programmer memory is one, or possibly two flat arrays of data.
- dynamic memory (ram) is for holding variable values.
- long term storage (hard drive) is for holding long term data.
To the hardware designer it is a multi layered hierarchy.
- registers
- multiple layers of cache
- dynamic devices such as ram and rom
- hard drives, network storage ...
Two big ideas
- Temporal Locality: The principle stating that if a data location is referenced the it will tend to be referenced again soon.
- Spatial locality: The locality principle stating that if a data location is referenced, data locations with nearby addresses will tend to be referenced soon.
Some terms:
- A block is the minimum unit of information that can be either present or not present in a cache.
  - As we look at caches, one thing we will "change" is block size.
- Hit Rate the fraction of memory accesses found in a level of the memory hierarchy (percent of time present).
- miss rate 1-hit rate. The percent of time data is not found in a level of the memory hierarchy.
- Hit time is the time to access memory including time to determine if the access is a hit or miss.
- Miss penalty is the time required to fetch a block of memory from a lower level.

A program executes loads about 25% its instructions. It executes stores about 10% of its instructions. The icache has a miss rate of .3% and the data cache has a miss rate of 2%. Assume that the hit time is clock speed of 200ps(pipelined) or 800ps nonpipelined, and a miss penalty is 50ns. What is the effective CPI of each machine?

     Raw time for n instructions
         seconds/cycle * cycles/instruction * n instructions/program
         PIPELINE COLUMN                      NON PIPELINE COLUMN 
         200 * 1 * n = 200n                   800 * 1 *n = 800n
 
     A miss penalty is 50000ps,  
        (see the table on page 396, this is essentially no cache)
        50000/200 = 250 clock cycles          50000/800 = 63 clock cycles


     Instructions:  99.7% of the instructions take 1 cycle.
                    .3% of the instructions take 250 or 63 cycles

       .997 + .003*250 =  1.7                .997 + .003*63 = 1.18

     Memory Accesses 
                     .35 of the instructions are memory accesses.
                     So .65 instructions have no miss penalty.

        The miss rate is 2% so the memory instructions will have
        .98 * 1 + .02 * 250 = 5.98          .98 * 1 + .02 * 63 = 2.24

        So overall
           .65 * 1 + .35 * 5.98 = 2.74      .65 * 1 + .35 * 2.24 = 1.43

     New CPI 
          1.7 + 2.74 = 4.44                  1.18 + 1.43 = 2.61

     Time for n instructions
         seconds/cycle * cycles/instruction * n instructions/program
            200 * 4.44 * n = 888n ps         800 * 2.61 * n = 2088n

The rest of 5.2 discusses different memory technologies
If you are interested read these.
We Have the triangle on 396 that discusses price vs performance vs size.