We have hit on the idea that we want to have all instructions fit into 32 bits.
But then we can't address the entire memory.
What to do?
Branch instructions are I type.
So the most we can branch is $2^16$ bytes.
But we declare that instructions must be word aligned.
So all branch addresses must end in $00_{16}$.
So the immediate is shifted by two bits to give us a word address.
This is still problematic.
We can get to words 0 through $2^{16}$ or 65,536
But this is signed, so we probably only have -32,768 to 32,767
But this is probably not good, look at where MARS puts us, we can't even jump anywhere in our program.
To address this, MIPS implements PC Relative branching.
In this case, the immediate word address is added to the current pc.
This employs the principal of locality.
The principle of locality states that there is a tendency for a processor to access the same set of memory locations repetitively over a short period of time.
Think about your programs
They tend to loop
They work in small sets of locations.
This is true for both space and time.
Take a look at the CPU on 277.
How about jumps?
The J type instruction has 26 bits.
Again, that is byte addressable, so we can shift it by 2.
This is treated as an unsigned number.
And is not pc relative.
Look at the picture on 283.
This covers both j and jal
But what if I want to jump further?
jr is your only solution.
But how do I get a 32 bit address in a register?
lui
I type
loads the upper part of a register with the 16 bit immediate
And sets the lower half of the register to 0.
So the register would be 0xNNNN0000
ori
Also I type.
Extend the number to 32 bits by padding with 0
The number would be 0x0000MMMM
Then or this with the register.
The sequence of these two will build a 32 bit number in a register.
Which we can use for a jr instruction.
The picture on 283 is sort of the final version of CPU presented in the book